Display protocol#

The device uses a Sharp LS021B7DD02 reflective memory-in-pixel LCD. The panel has 240 × 320 pixels.

Each subpixel has a one-bit latch. The panel retains the image without scan traffic.

The framebuffer uses RGB222. Each channel has four levels, and each pixel has 64 possible colors.

The FLPR writes pixels through a six-bit parallel bus. The M33 generates the continuous polarity waveform.

Signal paths#

Do not stop VCOM, VA, or VB while the panel has power. A DC bias can damage the liquid crystal.

The hardware timer generates this waveform independently of the scan operation.

Pixel encoding#

The panel makes four levels with area gradation. Each subpixel contains a large block and a small block.

Each two-bit channel has this mapping:

Use msb = (l >> 1) & 1 and lsb = l & 1. The packer does not need a lookup table.

Source-bus interleave#

The six data lines carry one bit for each channel of two adjacent pixels.

Each BCK edge clocks one pixel pair. Thus, 120 pairs require 60 BCK cycles.

Present a new pair before each rising and falling edge. Do not hold one pair for a complete cycle.

Gate scan#

The display has one gate line for each of its 320 rows. Write both area planes to the same gate line.

• GCK HIGH selects the two-thirds MSB block.
• GCK LOW selects the one-third LSB block.

One GCK period writes one row. The rising edge advances the gate. The falling edge keeps the same gate selected.

Writing a frame#

A frame scans the 320 rows. Keep INTB high for the complete scan.

INTB = HIGH
GSP = pulse
send two leading dummy gate periods
for each row:
    set GCK HIGH
    shift the MSB plane
    pulse GEN
    set GCK LOW
    shift the LSB plane
    pulse GEN
send six trailing dummy gate periods
INTB = LOW

• INTB LOW holds the current image.
• One GCK period advances one row.
• Each row uses two GEN pulses.
• Each plane uses 120 data words and four dummy words.
• Pulse GSP at the start. Release it on the first GCK edge.

Partial update#

The presenter compares row hashes and sends changed row spans to the FLPR. The FLPR advances past unchanged rows without GEN pulses.

The FLPR writes all 240 columns of each changed row. It stops after the last changed row.

Thus, the scan time depends mainly on the number and position of changed rows.

Power-on, power-off, and retention#

• During power-on, write a black frame. Wait at least 30 µs, and then start the COM waveform.
• During power-off, write the safe state before you stop the COM waveform.
• Refresh a static image at least once every two days.

Signal & timing reference#

Pins#

Timing#

The current FLPR uses approximately 210 ns for each BCK half-period. This gives a 420 ns period and approximately 2.38 MHz. It exceeds the 0.758 MHz maximum and violates the 660 ns minimum high and low times.

This timing passed a visual test on one panel at room temperature. It is not production validation. See the timing record.

Power#

The datasheet gives these typical module values. The values exclude COM capacitive-load current.

Power increases with the update rate. Partial updates reduce the number of rows that the FLPR writes.

Implementation#

• COM driver: com.rs and com_hw.rs
• FLPR scan: flpr_scan.c
• Wire packer: wire.rs
• Presenter: Rendering pipeline